Award

Even with rigorous software testing, exploitable software vulnerabilities frequently stem from memory issues. While memory-safe languages like Rust can offer greater inherent memory safety, they do not provide absolute protection against exploitable memory issues and cannot replace the extensive body of C/C++ code in the near future. A hardware approach called CHERI (Capability Hardware Enhanced RISC Instructions) has shown promise in effectively addressing multiple memory safety issues using an ARM Morello prototype. However, several hardware enhancements are still needed to fully realize the benefits of the CHERI experimental implementations. To address this need, in this effort, P&J Robinson Corporation (PJR), along with its subcontractors, proposes to design and develop Compact Pluggable Extension Board (CAPER) for selected CHERI hardware prototypes such as ARM Morello. The final output of this proposed effort will be a modular, U.S. -made, and small-footprint extension board that has been integrated and tested with selected CHERI prototype. The CAPER boards will improve cost efficiency, compactness, modularity, scalability, interoperability and supply chain reliability while offering the same ōCHERIö features for the security enhancement.